In ARM7 microcontrollers PWM is designed as separate module but it has all features as a general purpose timers have, just limited pins are associated. PWM module have improved match module which allows to have six channels of single edge controlled PWM or three double edge controlled PWM. There are seven match registers used with improved update logic. PWM modulator have additional shadow match registers that perform latch effect. This means that you can update match registers on instantly, but new values are taking effect only at the beginning of new cycle. This mechanism ensures that all updates are performed at he beginning of a new cycle through latch enable register(LER). In general purpose timers match registers take effect immediately after they are updated.

PWM signal outputs to device pins are traced through SR flip flops. RS flip-flops along with multiplexers allow to produce following PWM modes: single edge and dual edge controlled PWM. In single edge mode One match register(PWMMR0 controls the PWM cycle rate) while other match register depending on channel (PWMMR1...PWMMR6) control the position of edge.

In dual edge controlled PWM mode there are three match registers used. PWMMR0 control PWM cycle rate and other match register pairs control both edges this allowing to have three dual edge PWM outputs.

More details will be seen in future when working C examples will be provided.