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LPC2000 microcontrollers have at least two 32 bit timer counters. Lets take LPC2148 microcontroller where are two general purpose 32 bit timers that are identical except peripheral base address. These timers are for general purpose that can perform timer and counter operations. Timers have many features: Programmable 32 bit pre-scaler; Up to four 32 bit capture channels that can take snapshots with interrupt generation ability; Four 32 bit match registers that allow generate interrupt on match, generate interrupt and stop timer, generate interrupt and reset timer; Up to four output pins that can be set LOW/HIGH/TOGGLE on compare match; Timers nature is to count cycles of peripheral clock which speed depends on VPB divider value and can be equal to Processor clock (CCLK=PCLK) or be twice or four times slower. Timer counter block can select a capture signal as a clock source instead PCLK. As we mentioned timer0 and timer1 has a connection to real world ability. One type of connections is for Input events and other for output.
Input pins are marked CAP0.3...0 for timer/counter0 and CAP1.3...0 for timer/couter1. Through these capture pins signal transitions can be sensed and together with configured capture registers interrupts can be generated. As we see each timer have four capture pins assigned. So if more than one capture pin is selected, then pin with lowest number of pin is used. Output pins are used together with match registers and can generate signal toggle, go low, go high or do nothing on compare match. Each timer have four pins for match MAT0.3...0 for timer/Counter0 and MAT1.3...0 for timer /Counter1. Output pins can be configured to work in parallel providing same function.  If you look in diagram you can see that PCLK signal goes through 32 prescaller counter. Prescaller counter is a register which increments on each PCLK cycle and when value reaches max value which is set in prescaller register, then it resets, sends a count to timer counter and starts counting again from zero. Timer counter control register (TCR) has only two bits that enables/disables timer counting and resets timer. As we see in picture timer have 4 capture registers. Each capture register has associated capture pin. When capture event occurs (rising, falling ir both edges) the event on pin triggers a capture event. During capture event current timer value is stored to to associated capture register and if configured – an interrupt can be generated. This functionality allows calculating time between two events what leads to pulse width measurements or frequency counters. Capture events are controlled via Capture Control Register(CR) Timers have also four match registers that are associated with match pins. In match mode counter value is compared to value in match register and if values match event is triggered(external pin toggle, set, clear, no action) and timer can be reset, stopped or interrupt generated. Match events are controlled via Match Control Register(MCR). C Code examples coming soon. |